The traditional von Neumann computing architecture has become a main obstacle to continue improving the performance of computing system for emerging mass storage in the era of Big Data. Phase-change random access memory (PCRAM) is a promising circuit-building block for non-von Neumann computing architectures as it could combine both storage and computing function. Meanwhile, it is equipped with highly desired properties, such as nonvolatile, high device density, high programming speed, and long endurance of switching. The greatest challenge faced by PCRAM at this moment is how to reduce its power consumption further. However, the conventional memory cell exhibits a relatively high power consumption due to its large contact area between phase change material (PCM) and the heating electrode. Graphene nanoribbon (GNR) is a quasi-one-dimensional graphene nanostructure with ultra-high current carrying capacity (>10⁹ A/cm²) and high thermal stability, which can be used as a heating electrode for PCRAM.

A joint research team of researchers led by Zhitang SONG and Haomin WANG from the Shanghai Institute of Microsystems and Information Technology, Chinese Academy of Sciences (SIMIT) adapted the edge of GNR to prepare the smallest PCM unit device for the first time. The work titled with "Minimizing the programming power of phase change memory by using graphene nanoribbon edge-contact," was published online on July 18, 2022 in the journal of Advanced Science. Here is the link: https://onlinelibrary.wiley.com/doi/full/10.1002/advs.202202222. 

The team used the graphene edge as a blade electrode to contact the phase change material. The cross-sectional area between graphene and PCM is down to ~1 nm² when the GNR width is reduced to ~3 nm, the RESET current come down to ~0.9 μA, and the corresponding write energy consumption is as low as ~53.7 fJ, which is almost two orders lower in magnitude than that of current state-of-the-art devices, almost half of that in the cell made from carbon nanotube-gap. Meanwhile, GNR acts not only as a heating electrode but also as a semiconductor channel of field effect transistors, enabling the logic function of a D-type flip-flop at a frequency of 2.5 MHz.

This is the first report about high-performance PCRAM cell addressed by edge contact of GNR. The structure made by our approach is close to the scaling limit of PCRAM, and the cell keeps an ultra-low power consumption, a high programming speed, an excellent high/low resistance ratio and a good stability/endurance of programming. The successful development of this cell represents a huge advance in PCRAM performing logic operations at low power consumption, opening up a new avenue for computing in memory.  

Prof. Sannian SONG and Dr. Xiujun WANG from SIMIT are first author，who contributed equally to this work, and Prof. Haomin WANG and Zhitang SONG are co-corresponding author. The research work was partially supported by the National Natural Science Foundation of China, the National Key R&D Program of the Ministry of Science and Technology, the Strategic Priority Research Program of Chinese Academy of Sciences and the Science and Technology Commission of Shanghai Municipality. 

Figure 1. The highly scaled cell of PCRAM made with GNR edge contact (a) Schematic diagram of the cell, (b) relationship between power consumption and contact area. 

Figure 2. Voltage polarity dependence of the cycle endurance. (a) Schematic diagram of the measuring setup; (b) Cycle endurance of memory cell with ~3 nm-wide GNR edge contact at different voltage polarities.

Figure 3. A prototype of D flip-flop made from a memory cell with ~3 nm-wide GNR edge-contact. (a) Schematic diagram of D-type flip-flop, (b) the transfer characteristic curve of the memory cell in high/low resistance states, (c) cycle endurance, (d) demonstration of logic functions in the D flip-flop.