Professor Yemin Dong received a B.S. and an M.S. degree from Soochow University in 1998 and 2001, respectively. He received his Ph.D. from Shanghai Institute of Microsystem and Information Technology (SIMIT), Chinese Academy of Sciences (CAS) in 2004.From 2007 to 2016, he worked at GLOBALFOUNDRIES (Singapore) as a technical manager for technology development in different technology nodes. Prior to GLOBALFOUNDRIES, he worked at Grace Semiconductor Manufacturing Company (Now Hua Hong Semiconductor) in technology development in Shanghai. In March 2016, he joined SIMIT as a researcher to lead high-reliability IC design center to support the CAS pioneer Hundred Talents program. Currently he is working at Shanghai Industrial μTechnology Research Institute (SITRI) and leading a foundry-based design service team as well.Ph.D., Microelectronics, 2004, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
B.S., Physics, 1998, Soochow University
M.S., Condensed Matter Physics, 2001, Soochow University
Principal Engineer/Section Manager/Manager, Technology Development Department, GLOBALFOUNRIES (Singapore) Pte. Ltd., 2007-2016
Principal Engineer, Technology Development Department, Grace Semiconductor Manufacturing Company, 2004-2007
1. Dong, Y.M., Wang, X., Wang, X., Chen, M. and Chen, J. (2003): Low defect density and planar patterned SOI materials by masked SIMOX. Chemical Physics Letters378, 470-473.
2. Dong, Y.M., Chen, M., Chen, J., Wang, X., Wang, X., He, P., Lin, et al. (2004): Patterned buried oxide layers under a single MOSFET to improve the device performance. Semiconductor Science and Technology19, L25-L28.
3. Dong, Y.M., Chen, J., Wang, X., Chen, M., and Wang, X. (2004): Optimized implant dose and energy to fabricate high-quality patterned SIMOX SOI materials. Solid State Communications 130, 275-279.
4. Dong, Y.M., Chen, M., Chen, J., Wang, X. et al. (2004): Comparative study of SOI/Si hybrid substrates fabricated using high-dose and low-dose oxygen implantation. Journal of Physics D: Applied Physics 37, 1732-1735.
5. Dong, Y.M., Chen, J., Chen, M., et al. (2004): Synthesis and thermal conductivity measurement of high-integrity ultrathin oxygen-implanted buried-oxide layers. Japanese Journal of Applied Physics 43, 2185-2187.
6. Dong, Y.M., Wang, X., Chen, J., Chen, M., Wang, X., He, P., et al. (2003): Thermal conductivity of high-integrity nanometer buried oxides by SIMOX. SSDM Conference at in Tokyo, Japan, September 2003, 632-633.
7. Dong, Y.M., Wang, X., Chen, M., Chen, J., et al. (2003): Patterned SIMOX SOI materials with high degree of surface planarity and low defect density. SSDM Conference at in Tokyo, Japan, September 2003, 636-637.
8. Wu, X., Dong, Y.M., Zhuge, L., Ye, C., Tang, N., Ning, Z., Yao, W. and Yu, Y. (2001): Room-temperature visible electroluminescence of Al-doped silicon oxide films, Applied Physics Letters 78, 4121-4123.
9. Li, R., Yu, L., Xin, H., Dong, Y.M., Tao, K. et al. (2007): A comprehensive study of reducing the STI mechanical stress effect on channel-width-dependent Idsat. Semiconductor Science and Technology 22, 1292-1297.
10. Wang, J., Li, R., Dong, Y.M., Zou, X., Shao, L. and Shiau W. (2008) Substrate current characterization and optimization of high voltage LDMOS transistors. Solid-State Electronics. 52, 886-891
1. Dong, Y.M., Yi, L., Liu, Z.F., Verma, P.R. and Nambatyathu R. (2015): High voltage trench transistor. US Patent, US 9054133 B2, Date of Patent: Jun 9, 2015.
2. Verma, P.R., Yi, L. and Dong, Y.M. (2015): Integration of high voltage trench transistor with low voltage CMOS transistor. US Patent, US 8999769 B2, Date of Patent: Apr 7, 2015.
3. Verma, P.R., Yi, L. and Dong, Y.M. (2014): Integration of trench MOS with low voltage integrated circuits. US Patent, US 8637370 B2, Date of Patent: Jan 28, 2014.
4. Dong, Y.M., Verma, P.R., Zou, X., Cheng, C. and Chu, S.F. (2013): Integrated circuit system with high voltage transistor and method of manufacture thereof. Taiwan Patent, TW I413211 B Date of Patent: Oct 21, 2013.
5. Dong, Y.M., Verma, P.R., Zou, X., Cheng, C. and Chu, S.F. (2013): Integrated circuit system with high voltage transistor and method of manufacture thereof. China Patent, CN 101930946 B Date of Patent: Jul. 3, 2013.
6. Dong, Y.M., Verma, P.R., Zou, X., Cheng, C. and Chu, S.F. (2012): Integrated circuit system with high voltage transistor and method of manufacture thereof. US Patent, US 8138051 B2 Date of Patent: Mar 20, 2012.
7. Dong, Y.M., Wang, X., Chen, M., Li, Z., Tian, L., He, P. and Lin, X. (2006): Method of fabricating self-aligned source/drain on isolator nanometer MOSFET. China Patent, No. ZL 03151252.6 Date of Patent: Jun 28, 2005.
8. Dong, Y.M., Wang, X., Chen, M. and Chen, J. (2006): Fabrication of buried oxides with nanometer silicon channels by sidewall spacer technique. China Patent, No. ZL 03151253.4 Date of Patent: Jun 28, 2006.
9. Dong, Y.M., Chen, M, Wang, X., Wang, X., Chen, J. and Lin, Z. (2005): Optimized dose-energy SIMOX technique to fabricate patterned SOI materials. China Patent, No. ZL 02160742.7 Date of Patent: Jun 15, 2005.
10.Dong, Y.M., Wang, X., Chen, M., Wang, X. and Chen, J. (2005): Quasi SOI MOSFET structure and manufacturing method thereof. China Patent, No. ZL 03115424.7 Date of Patent: Jan 12, 2005.
